The present invention relates to a semiconductor arrangement and a method for manufacturing the semiconductor arrangement.
German Patent document No. P 4320780.4 describes a semiconductor diode having a first layer made of two partial layers, and a second layer which is situated on the first partial layer.
The present invention""s semiconductor arrangement and method for manufacturing the semiconductor arrangement has the advantage of providing diodes having an increased maximum permissible power and less forward voltage for a given chip surface, in a manner suitable for large-scale mass production, without a large amount of additional engineering expense. This is particularly advantageous when a maximum preselected chip surface area should not be exceeded in order to save chip surface, and when the size of the contact socket used to contact the semiconductor arrangement should not exceed a certain magnitude, in order to avoid paying for an increased current-carrying capacity of diodes particularly used in a motor-vehicle rectifier system, with an increased volume of the entire rectifier system. The present invention facilitates, given a constant surface area of the silicon